This invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a MOSFET gate insulating film in a semiconductor device using two types of power supply voltage in a single chip and a method of manufacturing the same.
As integrated circuits are being required to operate much faster, the gate electrode length of a MOSFET grows finer at an increasingly rapid pace. By 2000, the advent of an integrated circuit using MOSFETs with a gate electrode length on the order of about 0.15 .mu.m to 0.1 .mu.m is expected. In such a fine MOSFET, it is expected that the power supply voltage to bring out the optimum performance might more frequently differ from the power supply voltage determined by the interface with another device on the outside. For example, this corresponds to the following case: use of a power supply voltage of 2.5 V is preferable to the interface with an external device, whereas use of a power supply voltage of about 1.8 V is preferable to operating the relevant integrated circuit at high speed.
Another problem in miniaturizing MOSFETs arises from making the gate insulating film thinner. Specifically, the gate insulating film must be made thinner as the gate electrode length grows finer. In this case, when the electric field applied to the thin gate insulating film has reached 5 MV/cm or higher, the insulating film is more liable to be broken, decreasing the reliability.
For this reason, a semiconductor device required to operate at higher speed has employed such a structure including MOSFETs with different gate insulating films formed in a single chip and selectively using the MOSFETs with the gate insulating film thickness suitable for each power supply voltage.
Still another problem in making the gate insulating film thinner arises from: when p-type polysilicon is used for the gate electrode of a p-channel MOSFET with a fine gate length, p-type impurities, such as boron, included in the polysilicon pass through the thinner gate insulating film in various thermal processes carried out in the manufacturing process and diffuse throughout the substrate, which degrades the controllability of the threshold voltage. It is known that use of material including a trace of nitrogen for the gate insulating film is effective in dealing with the problem. For example, it is desirable that oxynitride should be used for a gate insulating film whose thickness is 6 nm or less.
Next, using FIG. 1 and FIGS. 2A to 2D, a conventional semiconductor device and a method of manufacturing the semiconductor device will be explained. As shown in FIG. 1, element isolating regions 12 have been formed at the main surface of a silicon (Si) substrate 11. In the element regions electrically separated by the element isolating regions 12, diffused layers 13 and 14 acting as source/drain regions are formed. A gate insulating film 15 is formed on the silicon substrate 11 between the source/drain regions 13. On the gate insulating film 15, a gate electrode 16 is formed, thereby constructing a MOSFET Q1. A gate insulating film 17 is formed on the silicon substrate 11 between the source/drain regions 14. A gate electrode 18 is formed on the gate insulating film 17, thereby constructing a MOSFET Q2.
The MOSFET Q1 constitutes an internal circuit. In the p-channel MOSFET in area A in which the MOSFET Q1 has been formed, p-type material, such as boron-doped polysilicon, is used for the gate electrode 16. In contrast, the MOSFET Q2 formed in area B constitutes a circuit for exchanging signals and data with an external device. The MOSFET Q1 formed in area A operates on about 1.8 V lower than MOSFET Q2 formed in area B and the dimension (gate length) of, for example, the gate electrode is 180 nm. In the MOSFET Q1, the gate insulating film 15 requires a thickness of about 4 nm to provide the optimum performance. In contrast, because an external power supply voltage of 2.5 V is applied to the MOSFET Q2 formed in area B, the gate insulating film 17 needs a thickness of about 6 nm. An oxynitride film is used as the gate insulating films 15 and 17.
The semiconductor device of FIG. 1 is formed by the processes shown in FIGS. 2A to 2D. First, as shown in FIG. 2A, element isolating regions 12 are formed in a silicon substrate 11. Then, impurities for controlling the threshold voltage of a MOSFET are introduced into the main surface of the silicon substrate 11.
Thereafter, as shown in FIG. 2B, to become a gate insulating film 17, oxynitride is deposited on the main surface of the silicon substrate 11. The oxynitride film has a thickness of, for example, about 5 nm. Following that, a resist pattern 19 is formed as a mask on the oxynitride film 17 in area B by, for example, photoetching techniques.
Next, after the oxynitride film 17 on area A has been removed, another oxynitride layer is deposited as a gate insulating film 15 to a thickness of, for example, 4 nm. In this case, the oxynitride film 17 on area B is subjected to another oxidation, which forms a gate insulating film 17 of about 6 nm in thickness (see FIG. 2C).
Thereafter, as shown in FIG. 2D, polysilicon 20 is deposited on the gate insulating films 15 and 17 to a thickness of, for example, about 200 nm. The polysilicon film is patterned by photoetching techniques, thereby forming gate electrodes 16 and 18.
Then, impurity ions are implanted into the silicon substrate 11. The resulting silicon substrate is then activated by rapid thermal annealing at about 1000.degree. C., thereby forming a diffused layer to act as the source/drain regions 13 and 14 of each of the MOSFETs Q1 and Q2. This completes a semiconductor device as shown in FIG. 1.
In the semiconductor device formed as described above, use of an oxynitride film for the internal circuit MOSFET Q1 using the gate insulating film as thin as about 4 nm prevents p-type impurities from diffusing from the gate electrode 16 into the silicon substrate 11. In the manufacturing processes, however, the MOSFET Q2 interfacing with an external device using the gate insulating film 17 as thick as about 6 nm has also a structure using an oxynitride film. In heat treatment at about 1000.degree. C., the gate insulating film of about 6 nm in thickness does not necessarily need oxynitride from the viewpoint of the diffusion of p-type impurities from the gate electrode 18 into the silicon substrate 11. Conversely, use of oxynitride causes the problem of decreasing the current driving capability of the MOSFET Q2 due to the appearance of an interface level. Therefore, use of oxynitride is unfavorable from the standpoint of making the operation speed of the semiconductor device faster.
In the conventional semiconductor device and the method of manufacturing the semiconductor device, since an oxynitride film has been used as all the gate insulating films in an LSI requiring two or more types of power supply, this has caused the problems of decreasing the current driving capability and operation speed of the MOSFET.